【獲證專利公告】恭賀!電機系王朝欽教授及團隊之研究成果「具製程、電壓及溫度補償之二倍供應電壓共容輸入輸出緩衝器/2xVDD-TOLERANT LOGIC CIRCUITS AND A RELATED」獲得美國發明專利!
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發明人 |
王朝欽教授 |
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系所 |
電機系 |
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專利名稱 |
具製程、電壓及溫度補償之二倍供應電壓共容輸入輸出緩衝器/2xVDD-TOLERANT LOGIC CIRCUITS AND A RELATED |
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證書號 |
US 7,915,914 B1 |
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公告日期 |
100年3月29日 |
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專利摘要 |
A 2.times.VDD-tolerant input/output (I/O) buffer circuit with process, voltage, and temperature (PVT) compensation suitable for CMOS technology is disclosed. A 2.times.VDD-tolerant I/O buffer with a PVT compensation circuit is implemented with novel 2.times.VDD-tolerant logic gates. Output slew rate variations can be kept within smaller ranges to match maximum and minimum timing specifications. A 2.times.VDD tolerant logic circuit for implementing the I/O buffer is also disclosed. |
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技轉服務窗口 |
林淑英(分機2686) |
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